6502 Processor - instructionset

Addressing Mode

Mode	Operand Formate

Immediate	#dd
Absolute	aaaa
Zero Page	aa
Implied
Indirect Absolute	(aaaa)
Absolute Indexed X	aaaa,X or aaaaX
Absolute Indexed Y	aaaa,Y or aaaaY
Zero Page Indexed X	aa,X or aaX
Zero Page Indexed Y	aa,Y or aaY
Indexed Indirect	(aa,X) or (aaX)
Indirect Indexed	(aa),Y or (aa)Y
Relative	aa or aaaa
Accumulator	A

ADC

Add to Accumulator with Carry

Opertation: A + M + C → A, C

N	Z	C	I	D	V
√	√	√	-	-	√

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	ADC	#dd	69	2	2
Zero Page	ADC	aa	65	2	3
Zero Page, X	ADC	aa,X	75	2	4
Absolute	ADC	aaaa	6D	3	4
Absolute, X	ADC	aaaa,X	7D	3	4*
Absolute, Y	ADC	aaaa,Y	79	3	4*
Indexed Indirect	ADC	(aa,X)	61	2	6
Indirect Indexed	ADC	(aa),Y	71	2	5*

* Add 1 if page boundery is crossed

AND

AND Memory with Accumulator

Logical AND to the Accumulator

Opertation: A ⋀ M → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	AND	#dd	29	2	2
Zero Page	AND	aa	25	2	3
Zero Page, X	AND	aa,X	35	2	4
Absolute	AND	aaaa	2D	3	4
Absolute, X	AND	aaaa,X	3D	3	4*
Absolute, Y	AND	aaaa,Y	39	3	4*
Indexed Indirect	AND	(aa,X)	21	2	6
Indirect Indexed	AND	(aa),Y	31	2	5*

* Add 1 if page boundery is crossed

ASL

Accumulator Shift Left

Opertation: C ← |7|6|5|4|3|2|1|0| ← 0

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Accumulator	ASL	A	0A	1	2
Zero Page	ASL	aa	06	2	5
Zero Page, X	ASL	aa,X	16	2	6
Absolute	ASL	aaaa	0E	3	6
Absolute, X	ASL	aaaa,X	1E	3	7

BCC

Branch on Carry Clear

Opertation: Branch on C = 0

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BCC	aa	90	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

BCS

Branch on Carry Set

Opertation: Branch on C = 1

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BCS	aa	B0	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to next page

BEQ

Branch on Result Equal to Zero

Opertation: Branch on Z = 0

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BEQ	aa	F0	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to next page

BIT

Tests Bits in Memory with Accumulator

Opertation: A M, M₇ → N, M₆ → V

Bit 6 and 7 are transferred to the Status Register. If the

result of A M is zero then Z = 1, otherwise Z = 0

N	Z	C	I	D	V
M₇	√	-	-	-	M₆

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	BIT	aa	24	2	3
Absolute	BIT	aaaa	2C	3	4

BMI

Branch on Result Minus

Opertation: Branch on N = 1

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BMI	aa	30	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

BNE

Branch on Result Not Equal to Zero

Opertation: Branch on Z = 0

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BNE	aa	D0	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

BPL

Branch on Result Plus

Opertation: Branch on N = 0

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BPL	aa	10	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

BRK

Force Break

Opertation: Forced Interupt PC + 2 ↓ P ↓

B	N	Z	C	I	D	V
1	-	-	-	1	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	BRK	00	1	7

BVC

Branch on Overflow Clear

Opertation: Branch on V = 0

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BVC	aa	50	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

BVS

Branch on Overflow Set

Opertation: Branch on V = 1

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Relative	BVS	aa	70	2	2*

* Add 1 if branch occurs to same page

Add 2 if branch occurs to different page

CLC

Clear Carry Flag

Opertation: C → 0

N	Z	C	I	D	V
-	-	0	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	CLC	18	1	2

CLD

Clear Decimal Mode

Opertation: D → 0

N	Z	C	I	D	V
-	-	-	-	0	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	CLD	D8	1	2

CLI

Clear Interrupt Disable Bit

Opertation: I → 0

N	Z	C	I	D	V
-	-	-	0	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	CLI	58	1	2

CLV

Clear Overflow Flag

Opertation: V → 0

N	Z	C	I	D	V
-	-	-	-	-	0

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	CLV	B8	1	2

CMP

Compare Memory and Accumulator

Opertation: A - M

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediat	CMP	#dd	C9	2	2
Zero Page	CMP	aa	C5	2	3
Zero Page, X	CMP	aa,X	D5	2	4
Absolute	CMP	aaaa	CD	3	4
Absolute, X	CMP	aaaa,X	DD	3	4*
Absolute, Y	CMP	aaaa,Y	D9	3	4*
Indexed Indirect	CMP	(aa,X)	C1	2	6
Indirect Indexed	CMP	(aa),Y	D1	2	5*

* Add 1 if page boundery is crossed

CPX

Compare Memory and Index X

Opertation: X - M

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediat	CPX	#dd	E0	2	2
Zero Page	CPX	aa	E4	2	3
Absolute	CPX	aaaa	EC	3	4

CPY

Compare Memory and Index Y

Opertation: Y - M

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediat	CPY	#dd	C0	2	2
Zero Page	CPY	aa	C4	2	3
Absolute	CPY	aaaa	CC	3	4

DEC

Decrement Memory by One

Opertation: M - 1 → M

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	DEC	aa	C6	2	5
Zero Page, X	DEC	aa,X	D6	2	6
Absolute	DEC	aaaa	CE	3	6
Absolute, X	DEC	aaaa,X	DE	3	7

DEX

Decrement Index X by One

Opertation: X - 1 → X

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	DEX	CA	1	2

DEY

Decrement Index Y by One

Opertation: Y - 1 → Y

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	DEY	88	1	2

EOR

Exclusive-OR Memory with Accumulator

Opertation: A ⊻ M → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	EOR	#dd	49	2	2
Zero Page	EOR	aa	45	2	3
Zero Page, X	EOR	aa,X	55	2	4
Absolute	EOR	aaaa	4D	3	4
Absolute, X	EOR	aaaa,X	5D	3	4*
Absolute, Y	EOR	aaaa,Y	59	3	4*
Indexed Indirect	EOR	(aa,X)	41	2	6
Indirect Indexed	EOR	(aa),Y	51	2	5*

* Add 1 if page boundery is crossed

INC

Increment Memory by One

Opertation: M + 1 → M

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	INC	aa	E6	2	5
Zero Page, X	INC	aa,X	F6	2	6
Absolute	INC	aaaa	EE	3	6
Absolute, X	INC	aaaa,X	FE	3	7

INX

Increment Index X by One

Opertation: X + 1 → X

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	INX	E8	1	2

INY

Increment Index Y by One

Opertation: Y + 1 → Y

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	INY	C8	1	2

JMP

Jump

Opertation: (PC + 1) → PCL

(PC + 2) → PCH

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Absolute	JMP	aaaa	4C	3	3
Indirect	JMP	(aaaa)	6C	3	5

JSR

Jump to Subroutine

Opertation: PC + 2↓ (PC + 1) → PCL

(PC + 2) → PCH

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Absolute	JSR	aaaa	20	3	6

LDA

Load Accumulator with Memory

Opertation: M → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	LDA	#dd	A9	2	2
Zero Page	LDA	aa	A5	2	3
Zero Page, X	LDA	aa,X	B5	2	4
Absolute	LDA	aaaa	AD	3	4
Absolute, X	LDA	aaaa,X	BD	3	4*
Absolute, Y	LDA	aaaa,Y	B9	3	4*
Indexed Indirect	LDA	(aa,X)	A1	2	6
Indirect Indexed	LDA	(aa),Y	B1	2	5*

* Add 1 if page boundery is crossed

LDX

Load Index X with Memory

Opertation: M → X

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	LDX	#dd	A2	2	2
Zero Page	LDX	aa	A6	2	3
Zero Page, Y	LDX	aa,Y	B6	2	4
Absolute	LDX	aaaa	AE	3	4
Absolute, Y	LDX	aaaa,Y	BE	3	4*

* Add 1 when page boundery is crossed

LDY

Load Index Y with Memory

Opertation: M → Y

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	LDY	#dd	A0	2	2
Zero Page	LDY	aa	A4	2	3
Zero Page, X	LDY	aa,X	B4	2	4
Absolute	LDY	aaaa	AC	3	4
Absolute, X	LDY	aaaa,X	BC	3	4*

* Add 1 when page boundery is crossed

LSR

Local Shift Right

Opertation: 0 → |7|6|5|4|3|2|1|0| → C

N	Z	C	I	D	V
0	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Accumulator	LSR	A	4A	1	2
Zero Page	LSR	aa	46	2	5
Zero Page, X	LSR	aa,X	56	2	6
Absolute	LSR	aaaa	4E	3	6
Absolute, X	LSR	aaaa,X	5E	3	7

NOP

No Operationr

Opertation: No Operation (2 cycles)

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	NOP	EA	1	2

ORA

OR Memory with Accumulator

Opertation: A ⋁ M → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	ORA	#dd	09	2	2
Zero Page	ORA	aa	05	2	3
Zero Page, X	ORA	aa,X	15	2	4
Absolute	ORA	aaaa	0D	3	4
Absolute, X	ORA	aaaa,X	1D	3	4*
Absolute, Y	ORA	aaaa,Y	19	3	4*
Indexed Indirect	ORA	(aa,X)	01	2	6
Indirect Indexed	ORA	(aa),Y	11	2	5*

* Add 1 if page boundery is crossed

PHA

Push Accumulator on Stack

Opertation: A↓

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	PHA	48	1	3

PHP

Push Processor Status on Stack

Opertation: P↓

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	PHP	08	1	3

PLA

Pull Accumulator from Stack

Opertation: A↑

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	PLA	68	1	4

PLP

Pull Processor Status from Stack

Opertation: P↑

N	Z	C	I	D	V
From Stack

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	PLP	28	1	4

ROL

Rotate Left

M or A

Opertation: C ← |7|6|5|4|3|2|1|0| ← C

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Accumulator	ROL	A	2A	1	2
Zero Page	ROL	aa	26	2	5
Zero Page, X	ROL	aa,X	36	2	6
Absolute	ROL	aaaa	2E	3	6
Absolute, X	ROL	aaaa,X	3E	3	7

ROR

Rotate Right

M or A

Opertation: C → |7|6|5|4|3|2|1|0| → C

N	Z	C	I	D	V
√	√	√	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Accumulator	ROR	A	6A	1	2
Zero Page	ROR	aa	66	2	5
Zero Page, X	ROR	aa,X	76	2	6
Absolute	ROR	aaaa	6E	3	6
Absolute, X	ROR	aaaa,X	7E	3	7

RTI

Return from Interrupt

Opertation: P↑ PC↑

N	Z	C	I	D	V
From Stack

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	RTI	40	1	6

RTS

Return from Subroutine

Opertation: PC↑, PC + 1 → PC

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	RTS	60	1	6

SBC

Subtract from Accumulator with Carry

Opertation: A - M - C → A

Note: C = Borrow

N	Z	C	I	D	V
√	√	√	-	-	√

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Immediate	SBC	#dd	E9	2	2
Zero Page	SBC	aa	E5	2	3
Zero Page, X	SBC	aa,X	F5	2	4
Absolute	SBC	aaaa	ED	3	4
Absolute, X	SBC	aaaa,X	FD	3	4*
Absolute, Y	SBC	aaaa,Y	F9	3	4*
Indexed Indirect	SBC	(aa,X)	E1	2	6
Indirect Indexed	SBC	(aa),Y	F1	2	5*

* Add 1 if page boundery is crossed

SEC

Set Carry Flag

Opertation: 1 → C

N	Z	C	I	D	V
-	-	1	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	SEC	38	1	2

SED

Set Decimal Mode

Opertation: 1 → D

N	Z	C	I	D	V
-	-	-	-	1	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	SED	F8	1	2

SEI

Set Interrupt Disable Status

Opertation: 1 → I

N	Z	C	I	D	V
-	-	-	1	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	SEI	78	1	2

STA

Store Accumulator in Memory

Opertation: A → M

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	STA	aa	85	2	3
Zero Page, X	STA	aa,X	95	2	4
Absolute	STA	aaaa	8D	3	4
Absolute, X	STA	aaaa,X	9D	3	5
Absolute, Y	STA	aaaa,Y	99	3	5
Indexed Indirect	STA	(aa,X)	81	2	6
Indirect Indexed	STA	(aa),Y	91	2	6

STX

Store Index X in Memory

Opertation: X → M

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	STX	aa	86	2	3
Zero Page, Y	STX	aa,Y	96	2	4
Absolute	STX	aaaa	8E	3	4

STY

Store Index Y in Memory

Opertation: Y → M

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form		OP CODE	No. Bytes	No. Cycles

Zero Page	STY	aa	84	2	3
Zero Page, X	STY	aa,X	94	2	4
Absolute	STY	aaaa	8C	3	4

TAX

Transfer Accumulator to Index X

Opertation: A → X

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TAX	AA	1	2

TAY

Transfer Accumulator to Index Y

Opertation: A → Y

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TAY	A8	1	2

TSX

Transfer Stack Pointer to Index X

Opertation: S → X

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TSX	BA	1	2

TXA

Transfer Index X to Accumulator

Opertation: X → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TXA	8A	1	2

TXS

Transfer Index X to Stack Pointer

Opertation: X → S

N	Z	C	I	D	V
-	-	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TXS	9A	1	2

TYA

Transfer Index Y to Accumulator

Opertation: Y → A

N	Z	C	I	D	V
√	√	-	-	-	-

Addressing Mode	Asembly Language Form	OP CODE	No. Bytes	No. Cycles

Implied	TYA	98	1	2

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Symbols

Prefix	Operand Form
A	Accumulator
X,Y	Index registers
M	Memory
P	Processor status register
S	Stack Pointer
√	Change
-	No change
+	Add
⋀	Logical AND
-	Subtract
⋁	Logical OR
⊻	Logical XOR
→,←	Transfer to
PC	Program counter
PCH	Program counter highbyte
PCL	Program counter lowbyte
#dd	8-bit immediate data value (2 hex digits)
aa	8-bit zero page address (2 hex digits)
aaaa	16-bit absolute address (4 hex digits)
↑	Transfer from stack (Pull)
↓	Transfer onto stack (Push)

(none)	Base 10 (Decimal)
$	Base 16 (Hexadecimal)
@	Base 8 (Octal)
%	Base 2 (Binary)
'	Ascii

Flag	Meaning
B	Break Command
N	Negative
Z	Zero
C	Carry
I	IRQ Disable
D	Decimal Mode
V	Overflow